S3F8S28XZZ 三星/IXYS单片机

2023-04-21

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Efficient register-oriented architecture
Selectable CPU clock sources
Idle and Stop power-down mode release by interrupt
Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned to specific interrupt levels.

2S3F8S28/S3F8S24Microcontroller

The S3F8S28/S3F8S24single-chip CMOS micro-controller is fabricated using a highly advanced CMOS process and is based on Zilog's newest CPU architecture. Its design is based on the powerful SAM8RC CPU core. Stop and idle (power-down) modes were implemented to reduce power consumption. The S3F8S28/S3F8S24is a micro-controller with 8K/4Kbyte multi-time-programmable Flash ROM embedded. Using the SAM8RC design approach, the following peripherals were integrated with the powerful core:

Threeconfigurable I/O ports (22pins)
18interrupt sources with 18vectorsand 8 interrupt levels
A 16-bit Timer 0withone 16-bit timer or two 8-bit timer mode.
A 16-bit Timer 1with interval & Capture function.
A free runningWatchdog Timer with interrupt and Reset.
Analog to digital converter with thirteeninput channels (MAX.) and 12-bit resolution
One UART module
One IIC module
TwoPWM outputs with three optional mode: 12-bit (6+6); 8-bit (6+2); 14-bit (8+6);

The S3F8S28/S3F8S24microcontroller is ideal for use in a wide range of electronic applications requiring simple timer/counter, PWM, ADC. S3F8S28/S3F8S24is available in a 24/20-pin SOP Packageand a 24-pin TSSOP package and a 20-pin DIPpackage.